INDUSTRY ANALYSIS
PCs May Cool First: Why HBM Demand Could Last Longer, and What It Means for Taiwan's Memory Industry
PCs and AI servers face different memory cycles. Higher end-product prices and brand inventories may slow PC purchasing first, while AI deployment, inference, and long-context applications could extend HBM demand growth. DDR4 shortages may not ease before DDR5 shortages, however, and greater technical efficiency does not necessarily reduce total HBM demand. This article examines supply, end demand, and memory tiering, then distinguishes the actual roles of TSMC, PSMC, ASE Technology Holding, Powertech Technology, CHPT, and Phison.
One memory cycle can have several turning points
Based on the information currently available, this article's baseline assessment is that PC end demand and related memory purchasing may slow before HBM, while HBM demand growth and supply pressure could persist longer.
That assessment assumes AI infrastructure investment continues turning into deployments and qualified HBM output does not grow fast enough to fully meet customer demand. It does not imply a universal PC downturn or continuously rising HBM prices. Demand, shipments, inventory, and prices must be tracked separately.
1. PC cost pressures are reaching consumers
On September 19, 2026, Acer Chairman and CEO Jason Chen said Acer still held high memory inventories and that DDR4 and DDR5 availability had increased. He also said higher prices were beginning to suppress consumption and demand. This offers a clue that PCs could cool first, although his supply observations are limited by Acer's brand and product mix. [1]
On September 30, TrendForce reported that higher component costs were reaching notebook prices and weakening retail sales. PC brands nevertheless continued buying aggressively because they feared tight supply in 2027. Weaker consumer demand and elevated upstream orders can therefore coexist. [2]
In this article's assessment, once earlier stockbuilding provides sufficient inventory, delayed replacements or lower-specification purchases by consumers could prompt brands to reduce replenishment. The purchasing demand seen by memory suppliers could then weaken faster than underlying usage demand.
Higher inventory alone is not sufficient evidence of a demand reversal. Purchasing ahead of price increases, larger safety stocks, and higher unit prices can all raise the book value of inventory. Confirming a turning point requires inventory days, physical capacity, retail sales, and subsequent purchasing volumes—not just inventory value.
2. HBM growth depends on AI deployment and memory per system
HBM vertically stacks multiple DRAM layers to provide high bandwidth. Its demand is closely tied to AI accelerator deployments, memory capacity per accelerator, and system architecture. [7]
In its September 30 earnings-call materials, Micron said it had completed agreements covering the vast majority of its 2027 HBM bit supply and expected HBM bit shipments to outgrow conventional DRAM through 2028. It also identified model size, context length, and concurrent users as increasing AI memory requirements. This is a supplier outlook, not a guarantee, but it indicates order visibility extending into the following year. [3]
From a supply-and-demand perspective, HBM is supported not only by large-model training but also by expanding inference services and more complex uses. As AI moves from occasional answers to sustained reasoning, repeated tool use, and longer retained contexts, overall capacity and bandwidth requirements can rise even when each workload becomes more efficient.
“Less memory per computation” and “more HBM for the market” are therefore compatible. The first describes efficiency; the second also depends on deployment scale and actual usage.
3. Has new demand already exceeded the HBM saved by technical improvements?
The available evidence supports a limited conclusion: efficiency gains have not brought the market broadly into oversupply, and new deployments and specification requirements still create substantial pressure. Shipment growth alone, however, cannot precisely quantify how much new demand exceeds technical savings.
A simplified relationship at the accelerator level is:
HBM capacity required for new installations in a period ≈ shipments of HBM-equipped accelerators × average HBM capacity per accelerator.
Supplier purchasing volumes are also affected by stockbuilding, inventory drawdowns, and delivery timing. Software improvements do not immediately remove HBM already packaged into hardware. They first change the workload existing equipment can support, and later influence next-generation configurations and new-equipment demand.
The following is an arithmetic example, not a market forecast: if HBM-equipped accelerator shipments rise 60% and average capacity per accelerator falls 20% through architecture and efficiency improvements, newly installed capacity is still 1.6 × 0.8 = 1.28 times the previous level, an increase of 28%. Efficiency reduces demand relative to what it otherwise would have been, but does not offset all expansion.
TrendForce's August forecast suggested HBM bit shipments could grow 50%–60% in 2027 and still lag demand growth, while some AI chip designers were considering lower-capacity HBM configurations. [4] This supports the presence of supply pressure. The 50%–60% figure is a shipment-growth forecast, not a shortage percentage.
The cited public information does not provide complete supply and demand quantities for the same period, product generation, and qualification criteria. It is therefore inappropriate to assign a definite percentage to the global HBM shortfall. Contracted capacity, additional requests, and customer safety stocks also cannot simply be added together as end demand.
4. Shortages can ease, but not through a single new factory alone
Improving HBM supply requires progress across DRAM wafer output, usable yield, stacking and testing capacity, and advanced packaging that integrates memory with compute chips. Capacity at these stages is not fully interchangeable. [7][8]
In the short term, better yields, product-mix changes, lower-capacity configurations, and more efficient memory management can ease pressure on particular systems. Longer-term improvement requires additional wafer and packaging capacity. Micron's latest plans included output from its Singapore HBM advanced-packaging facility in early 2027 and meaningful product shipments from its Tongluo site in Taiwan around mid-2027. New capacity ramps gradually; a start-up date does not mean shortages disappear immediately. [3]
Demand can also adjust. Data-center power constraints, deployment delays, or weaker-than-expected AI investment returns could defer purchasing. This article's expectation of a longer HBM growth period must be reassessed as those conditions change.
5. DDR4 may not ease first, and DDR5 is not a single market
Dividing the market into “HBM and DDR5 stay short, DDR4 and older products normalize first” is too simplistic. Applications, capacity, supplier exits, and customer qualification matter alongside the product generation.
| Market | Possible demand changes | Key supply conditions | This article's assessment |
|---|---|---|---|
| PC DDR4 and mainstream DDR5 | Higher prices, delayed replacements, and inventory adjustments may weaken purchases | Whether suppliers reduce PC allocations | Purchasing may weaken first, while prices need not fall at the same time |
| Server DDR5/RDIMMs | AI infrastructure and associated servers support demand | Qualified products, assembly/test capacity, and front-end capacity | Track separately from PC DDR5 |
| HBM | AI accelerator deployments and capacity requirements provide support | Generation qualification, yield, stacking, and integration packaging | Supply-demand pressure may persist longer |
| Older-generation and specialty DRAM | End-market growth may be limited | Whether output cuts or exits outpace declining demand | Shortages can persist even with weak demand |
These are scenarios derived from public information. [2][4][5]
In June, TrendForce reported that major suppliers were reducing allocations to mature products, with supply pressure extending even to DDR3 and DDR2. [5] Shortages cannot be judged from demand alone: a shrinking market can experience rising prices if supply contracts faster.
6. New computing techniques change how HBM is used
Techniques that reduce HBM use continue to advance. Lower-precision quantization can reduce storage for weights and caches. NVIDIA's NVFP4 KV-cache technology, for example, can cut memory usage for that portion by up to approximately half relative to FP8 under its evaluation conditions. This does not directly halve total server HBM requirements, because weights, other working data, and service configurations must still be counted. [6]
Architectural responsibilities are also changing. NVIDIA describes Groq 3 LPX as using on-chip SRAM for low-latency inference alongside Rubin GPUs. GPUs still handle input processing and attention, while LPUs perform particular decoding work. [16] Such designs may reduce HBM intensity for some tasks, but also show that new architectures can operate alongside HBM-based systems.
The relevant questions are how much HBM-equipped hardware is needed at the same model quality, latency, and service volume, and whether usage grows faster after efficiency improves. Technical substitution changes the growth trajectory; concluding that total demand is falling requires corresponding evidence in deployments and purchasing.
7. How Taiwanese companies participate in HBM
The principal suppliers of HBM memory itself include SK hynix, Samsung, and Micron. [3][7][15] Taiwanese companies participate in base dies, process services, packaging, testing, and system applications. The representative companies below have roles supported by public information. The table identifies the limits of that evidence and is not a complete supplier list.
| Company | Publicly supported role | How to interpret its HBM connection |
|---|---|---|
| TSMC (2330) | SK hynix announced use of TSMC advanced logic processes for base dies beginning with HBM4; CoWoS integrates compute chips and HBM. [7][8] | Participates in base-die logic and system packaging. Neither is equivalent to manufacturing HBM core DRAM dies. |
| PSMC (6770) | Announced HBM/PWF foundry cooperation with Micron at its Hsinchu facilities in March 2026. [9] | A specific cooperation announcement exists, but it does not disclose a production scale or revenue share verifiable for this article. |
| ASE Technology Holding (3711) | ASE's VIPack platform includes 2.5D/3D packaging supporting dense SoC/HBM interconnects. [10] | Participates in advanced packaging and heterogeneous integration. Platform capability does not establish specific customer orders or HBM revenue. |
| Powertech Technology (6239) | Its Q1 2026 investor presentation lists HBM Applications and describes strengthening technology and production capabilities with customers. [11] | Evidence of deeper HBM assembly/test capability and cooperation, not proof that every next-generation project is shipping at scale. |
| CHPT (6510) | Official application information lists HBM and relevant NS-series probe cards. [12] | Provides test interfaces for chip testing; does not manufacture the memory itself. |
| Phison (8299) | aiDAPTIV software, SSDs, and NAND storage expand memory capacity available to AI workloads. [13][14] | Participates in AI memory tiering and data management, not HBM die, stack, or base-die fabrication. |
“Taiwanese company” must also be distinguished from “manufacturing in Taiwan.” Micron is a US company; its Taiwanese DRAM operations and expansion are part of the supply chain, but Micron Taiwan is not an independent Taiwan-listed HBM supplier. [17] Likewise, being a memory company or module maker does not by itself establish volume HBM production.
Figure: Representative Taiwanese company roles in HBM processes, assembly/test, and AI memory tiering. Cooperation plans and public product capabilities do not establish particular production volumes. Information cutoff: October 3, 2026. Sources: [7]–[15], [17].
8. Phison expands usable AI memory through tiering
Phison's aiDAPTIV manages GPU memory, system DRAM, and NAND Flash in multiple tiers. SSDs hold some working data and caches to support local AI fine-tuning, inference, and longer contexts. [13] “GPU memory” can mean HBM or GDDR; some platforms use shared system memory. The term must be interpreted against the hardware configuration.
For buyers, the potential value is greater effective memory capacity at lower cost, or deferring additional GPU purchases, when the solution meets workload requirements. Phison has also announced NAND-based AI KV-cache and related software solutions. [14]
Expandable capacity does not make bandwidth and latency equal across tiers. Data movement, cache hit rates, model size, and acceptable response time determine practical results. Individual demonstrations should not be generalized into a claim that every large data center can replace HBM one-for-one with SSDs.
This article infers that Phison could participate in two trends: AI expansion increasing demand for storage and controllers, and higher memory costs increasing interest in tiered solutions. It belongs in the AI memory supply-chain discussion, but its business logic should be analyzed separately from that of HBM manufacturers.
What might happen next?
The more plausible picture is increasing divergence between application markets. PCs may encounter price and inventory constraints earlier; HBM remains supported by AI deployments and the time required to ramp supply. Opportunities for Taiwanese companies should be judged by their particular process, packaging, testing, or system capabilities, then updated as shipment and revenue evidence develops.
Sources & notes
- Company releases and product pages establish public roles and company statements. Market outlooks should be interpreted according to their source dates.
- [1] Central News Agency, report on Acer's Jason Chen expecting Q4 PC price increases of 5%–20% and a price peak around the middle of the following year, September 19, 2026.
- https://www.cna.com.tw/news/afe/202609190097.aspx
- [2] TrendForce, AI Server Demand Sustains Memory Contract Price Increases in 4Q26, While Consumer-Side Pressure Persists, September 30, 2026.
- https://www.trendforce.com/presscenter/news/20260930-13258.html
- [3] Micron, Fiscal Q4 2026 Earnings Call Prepared Remarks, September 30, 2026. Manufacturing expansion, HBM, and market outlook.
- https://s25.q4cdn.com/621799436/files/doc_financials/2026/q4/Q4-FY26-Prepared-Remarks.pdf
- [4] TrendForce, DRAM Supply to Remain Tight in 2027, Prompting NVIDIA to Lower HBM Configurations for Rubin Ultra, August 4, 2026.
- https://www.trendforce.com/presscenter/news/20260804-13166.html
- [5] TrendForce, Consumer DRAM Shortages Extend to DDR2 Products with Contract Prices Expected to Continue Rising in 3Q26, June 22, 2026.
- https://www.trendforce.com/presscenter/news/20260622-13112.html
- [6] NVIDIA, Optimizing Inference for Long Context and Large Batch Sizes with NVFP4 KV Cache. Technical article accessed October 3, 2026.
- https://developer.nvidia.com/blog/optimizing-inference-for-long-context-and-large-batch-sizes-with-nvfp4-kv-cache/
- [7] SK hynix, SK hynix Partners with TSMC to Strengthen HBM Technological Leadership, April 19, 2024.
- https://news.skhynix.com/en/sk-hynix-partners-with-tsmc-to-strengthen-hbm-technological-leadership/
- [8] TSMC, CoWoS, official technology page, accessed October 3, 2026.
- https://3dfabric.tsmc.com/english/dedicatedFoundry/technology/cowos.htm
- [9] PSMC, announcement on completion of the Tongluo transaction and HBM/PWF cooperation, March 16, 2026.
- https://www.powerchip.com/zh-tw/insights/press-releases/content/20260316
- [10] ASE, VIPack, official technology page, accessed October 3, 2026.
- https://ase.aseglobal.com/ch/vipack/
- [11] Powertech Technology, Q1 2026 investor presentation, April 28, 2026, HBM Applications.
- https://mopsov.twse.com.tw/nas/STR/623920260428M001.pdf
- [12] CHPT, Market Application, Memory/HBM and NS-series probe cards, accessed October 3, 2026.
- https://www.chpt.com/eng/xmdoc/cont?sid=0L186474690185516679&xsmsid=0H066508922180038351
- [13] Phison, announcement of aiDAPTIV multitier memory architecture for edge AI inference, March 17, 2026.
- https://www.phison.com/zh-tw/phison-rescales-local-ai-inferencing-with-flash-memory-expansion-2/
- [14] Phison, Phison Unlocks Full-Scale AI Deployment Across Industries, June 2, 2026.
- https://www.phison.com/phison-unlocks-a-full-scale-ai-deployment-across-industries-building-an-ecosystem-with-pascari-aidaptiv/
- [15] Samsung, Samsung Ships Industry-First Commercial HBM4 With Ultimate Performance for AI Computing, February 12, 2026.
- https://news.samsung.com/global/samsung-ships-industry-first-commercial-hbm4-with-ultimate-performance-for-ai-computing
- [16] NVIDIA, Inside NVIDIA Groq 3 LPX: The Low-Latency Inference Accelerator for the NVIDIA Vera Rubin Platform, March 16, 2026.
- https://developer.nvidia.com/blog/inside-nvidia-groq-3-lpx-the-low-latency-inference-accelerator-for-the-nvidia-vera-rubin-platform
- [17] Micron, Micron Completes Acquisition of PSMC's Tongluo P5 Site in Taiwan, March 16, 2026.
- https://tw.micron.com/about/press/news/micron-completes-acquisition-of-psmc-s-tongluo-p5-site-in-taiwan