ENGLISH OVERVIEW
High-Bandwidth Memory
Stacked DRAM with a wide data interface
HBM stacks multiple DRAM dies with vertical connections such as through-silicon vias. It is often placed beside high-performance processors on a shared package platform. Capacity measures stored data; bandwidth measures data moved per second.
Different from a server memory module
HBM uses stacked dies and close package connections rather than a conventional replaceable DIMM. It is not a memory module users can simply swap.
- Thin dies, TSVs and stacking increase alignment, defect-control and thermal-management requirements.
Packaging and memory must be qualified together
CoWoS is one packaging option for integrating HBM with logic. Their qualification and supply schedules interact.
- Compare memory generation, stack configuration, bandwidth and capacity rather than treating every HBM product as identical.
Separate memory vendors, base dies and manufacturing
HBM product vendors include SK hynix, Samsung and Micron. TSMC, PSMC and Phison have distinct roles.
- TSMC: SK hynix HBM4 logic-base-die cooperation and CoWoS integration.
- PSMC: announced Micron HBM/PWF manufacturing cooperation; its WoW platform is listed separately.
- Phison: aiDAPTIV uses NAND for capacity extension; that does not make Phison an HBM DRAM manufacturer.
- HBM requires DRAM design, TSVs, thinning, precise stacking, testing and thermal engineering, not stacking finished DDR5 parts.
Connected industry roles
Links describe supply, classification, technology or services. They do not establish transactions between individual companies.
High-Bandwidth Memory → CoWoS Advanced Packaging
Integrated component
CoWoS can integrate HBM and logic chips; HBM is memory, while CoWoS is packaging technology.
TSMC | CoWoS-S/R/LHigh-Bandwidth Memory → GPUs and AI Accelerators
High-bandwidth memory
Some high-performance GPUs use HBM; capacity and bandwidth depend on configuration.
NVIDIA | H200: a compute and HBM system exampleWafer Fabrication ↔ High-Bandwidth Memory
DRAM dies and subsequent stacking
HBM needs DRAM dies, vertical interconnects and stacking; wafer fabrication is one stage.
Micron | HBM architectureDRAM chips → High-Bandwidth Memory
HBM is a DRAM architecture
a role relationship, not a contract among all listed companies.
Micron | HBM products and architectureHBM logic base dies → High-Bandwidth Memory
Logic base for the stack
a role relationship, not a contract among all listed companies.
SK hynix | TSMC cooperation on HBM4 base dies and CoWoS integrationHBM / PWF manufacturing → High-Bandwidth Memory
Micron HBM manufacturing cooperation
a role relationship, not a contract among all listed companies.
PSMC | March 16, 2026 Micron HBM/PWF cooperationCompany examples & product roles
HBM die and stacked-memory manufacturing, base logic-die foundry services, and package integration are different roles.
TSMC ↗
Related: packaging integration
Integrates computing chips and HBM through CoWoS; not an HBM DRAM manufacturer.
Official product / role sourceSK hynix ↗
HBM memory manufacturer
Develops and manufactures stacked high-bandwidth memory.
Official product / role sourceMicron ↗
HBM memory manufacturer
HBM products for AI and high-performance computing.
Official product / role sourceSamsung Electronics ↗
HBM memory manufacturer
Supplies HBM products, distinct from base-die foundry and package-integration services.
Official product / role sourceSources
- Micron | HBM architecture
- Micron | HBM3E stack configurations
- NVIDIA | H200 compute and HBM example
- Samsung | HBM products
- SK hynix | TSMC cooperation on HBM4 base dies and CoWoS integration
- PSMC | March 16, 2026 Micron HBM/PWF cooperation
- PSMC | COMPUTEX 2026: 3D AI Foundry and ecosystem partners
- Phison | aiDAPTIV cache memory: role and limitations
- SK hynix | HBM processes and TSVs