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Separate glass materials, vias, metallization and routing before examining glass-core substrates and interposers. Equipment, processes and architectures are related, but glass-substrate products do not all follow one route.
Raw glass supplies the material platform, but vias, metallization and routing create electrical interconnects. Via processing defines vertical paths; metallization makes them conductive; build-up layers and redistribution routing connect fine contacts to their destinations. Packaging must then validate the glass with chips and other materials. Glass-core substrates and glass interposers occupy different structural levels: some processing steps overlap, while product requirements and delivery boundaries differ.
Thickness, thermal expansion and surface needs guide material selection. Suitable laser and, where applicable, wet processing form vias, yielding a structure for further processing rather than complete interconnects.
Adhesion and seed-layer preparation support copper deposition. Sidewall-coated or copper-filled vias connect to surface routing formed with dielectric layers, imaging and copper processing.
Packaging connects the processed structure with dies and other interfaces. Electrical and thermomechanical validation combine with checks for via geometry, cracks and stress throughout processing.
Identify whether the deliverable is raw glass, a drilled core, a metallized core or a complete substrate. Dimensional stability must be evaluated together with via processing, copper adhesion and package reliability.
Specialty glass, through-glass vias (TGVs), metallization and fine wiring connect to glass-core substrates, glass interposers and package integration. This map focuses on glass that remains permanently in the finished product.
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Specialty glass is the input for subsequent via and wiring processes. Designs specify thermal expansion, dielectric properties, thickness and surface quality.
AGC, SCHOTT and Corning publish glass information for packaging or TGV applications. Some material suppliers also provide via processing.
Distinction: Solid packaging glass is different from PCB glass cloth. Display-glass supply alone does not establish a GCS product role.
Scope of these company examples
Public glass materials and TGV substrates for semiconductor packaging and interposers.
Product / role sourcePublic precision-glass panels suitable for TGV processing and metallization.
Product / role sourcePublic TGV-glass products and a GCS demonstration with AUO; collaboration sources are provided in the topic references.
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Processing turns glass into core intermediates with through-holes or other microstructures for subsequent metallization and wiring.
AGC publishes glass with customized hole designs. Ingentec offers TGV-core processing, microstructures and process integration. TGV describes a via structure; an electrical connection still requires conductive material.
Distinction: Delivering glass with holes does not prove complete build-up wiring or qualification as the finished substrate for a particular AI chip.
Scope of these company examples
Public glass-via, microstructure and process-integration services, including LADY laser modification and vapor etching.
Product / role sourcePublic glass processing to customer via requirements; does not establish complete-substrate volume production.
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After via formation, metallization creates conductive paths. Designs may use copper on via walls or filled vias, followed by surface preparation for wiring.
DNP's pilot-line plans distinguish metallized via walls from copper-filled structures. This node covers the core, not an automatically completed package substrate with every build-up layer.
Distinction: Filled vias and plated via walls are different structures. Yield depends on adhesion, filling, stress and reliability together.
Scope of these company examples
Pilot-production plan: a December 2025 announcement targeted new-line samples in early 2026 and a volume-production system in FY2028; milestone completion is not verified here.
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Dielectric layers and copper wiring redistribute fine chip connections and link them to vertical paths such as TGVs. Different package architectures require different wiring designs.
AUO has published GCS and RDL process cooperation; Innolux exhibition materials also list RDL and GCS. Glass changes the core structure, while outer layers can still use materials such as ABF.
Distinction: RDL-first and chip-first describe manufacturing routes; GCS describes substrate structure. RDL on glass alone does not prove the glass remains in the finished package.
Scope of these company examples
Development and validation: demonstrated GCS with Corning, with ongoing TGV, via metallization and reliability work; volume commercial shipments are unconfirmed.
Product / role source2026 exhibition materials list RDL and GCS businesses; they do not confirm volume GCS shipments.
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Laser machining or modification creates structures for microvias in glass. Some methods then use selective etching to form through-holes.
LPKF LIDE, E&R laser processing with wet etching, and the laser validation system developed by ITRI with Contrel illustrate different equipment and process approaches.
Distinction: Equipment capability, customer yield, qualification and production shipments are different evidence. Not every via method needs the same downstream etching.
Scope of these company examples
Public equipment and technology for precision vias and panel processing in glass cores.
Product / role sourcePublic via-formation technology combining lasers and wet etching.
Product / role sourceITRI, Contrel and Innolux established a TGV process-validation system; this does not establish production-equipment shipment volumes.
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Wet processing can remove laser-modified glass and control via shape. Whether it is used depends on the via-forming technology.
E&R's E-Core alliance announcement explicitly identifies Scientech's wet-etch role, supporting its inclusion as an equipment supplier.
Distinction: Wet etching is one route. Ingentec's published vapor-etch processing service must not be relabeled as wet-etch equipment.
Scope of these company examples
Publicly identified wet-etching role in the E-Core alliance.
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These materials and processes support adhesion, conductive seed layers and copper deposition in vias, creating electrical paths in an insulating glass structure.
In July 2026, MKS Atotech announced a wet-metallization process covering adhesion promotion, an electroless-copper seed layer and copper filling.
Distinction: A chemistry or process supplier is not a finished-substrate manufacturer. Wet processing is not the only metallization option.
Scope of these company examples
An integrated wet-metallization process announced July 28, 2026; this is not a customer-shipment announcement.
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Lamination integrates insulating films and other materials into a glass-core substrate structure to support subsequent fine wiring.
The E-Core alliance announcement includes Group Up in ABF-lamination equipment cooperation. This equipment role differs from Ajinomoto's film-material role.
Distinction: Lamination equipment, dielectric materials and finished wired substrates belong to different stages. The stack-up determines the dielectric selection.
Scope of these company examples
Public E-Core alliance role supplying ABF lamination and related process equipment.
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Lithography forms and aligns fine wiring patterns on large glass substrates for subsequent circuit fabrication.
Onto Innovation publishes the JetStep X500 glass-substrate lithography solution. It supports panel-level manufacturing alongside inspection and measurement systems.
Distinction: Equipment that handles glass does not establish that every customer is mass-producing glass-core substrates.
Scope of these company examples
Public JetStep X500 glass-substrate exposure solution.
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Inspection checks via shape, edge chipping, microcracks, films and residual stress, supporting quality control at several processing stages.
Onto provides glass-defect and TGV metrology solutions. ITRI has announced a photoelastic inspection system collaboration involving Contrel and Innolux. Inspection is not limited to a final check.
Distinction: Measurement equipment, process validation and customer reliability qualification of a complete package are different activities.
Scope of these company examples
Firefly G3 supports crack, edge-chip, TGV and film-related inspection.
Product / role sourceCollaborative validation with Innolux using photoelastic inspection after laser processing of glass.
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A glass-core substrate combines a permanent glass core with build-up dielectrics, metal wiring and vertical connections, linking packaged chips to external circuits.
AUO, Innolux, Absolics/SKC, Samsung Electro-Mechanics, LG Innotek and TOPPAN have published development or product activity. Core processing, wiring integration and customer validation should be assessed separately.
Supplier cards retain published status and dates. Plans to sample or establish production remain targets unless completion is evidenced; unconfirmed volume shipments are not proof of no shipments.
Distinction: Demonstrations, samples, reliability validation and commercial volume shipments are different milestones. Not every participant is labeled as a mass producer.
Scope of these company examples
Development demonstration: an August 31, 2026 announcement describes Corning glass and AUO RDL collaboration with ongoing reliability validation.
Product / role sourcePublic business and technical collaboration: GCS appears in 2026 exhibition materials, separately from existing FOPLP; volume shipments are unconfirmed.
Product / role sourceQualification and commercialization preparation: September 22, 2026 announcement says embedded samples entered reliability testing and non-embedded solutions were preparing for PoC by year-end.
Product / role sourceA 2026 technology demonstration covers microvias, metal filling and surface processing; it does not confirm volume shipments.
Product / role sourceDevelopment target: plans to establish volume-production capability in 2027–2028; a forward-looking goal.
Product / role sourceDevelopment demonstrations include TGVs, recesses at different depths and glass-core substrate architectures; volume shipments are not asserted.
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A glass interposer uses wiring and vertical connections to support multi-chip packaging. It occupies a different position in the package stack from a glass-core substrate.
TOPPAN publicly presents glass-core FC-BGA and glass interposers as different applications. They may share processing capabilities but are neither the same finished product nor mandatory consecutive stages.
Distinction: Glass-core substrates are not glass interposers. Their development does not prove that all silicon interposers or CoWoS architectures have been replaced.
Scope of these company examples
Publicly lists glass interposers and glass cores as distinct architectures, not the same finished product.
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Package integration combines a glass-core substrate or interposer with chips and other parts, then assesses electrical, thermomechanical and package reliability.
Intel presented glass-core, copper-filled TGV and thermal-cycling reliability research at ECTC 2026. It provides a route into packaging R&D, not evidence that every established packaging company already delivers glass-based products.
Distinction: A research demonstration does not establish a commercial production product, customer list or shipment volume.
Scope of these company examples
Research demonstrated at ECTC 2026 covers copper-filled TGVs, thermal-cycling reliability and large AI/HPC packages.
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Large AI processors, multi-chip systems and high-speed interconnects are published development directions for glass substrates. Dimensional stability, wiring density and signal characteristics are key considerations.
AUO, LPKF and Intel materials identify AI, HPC or high-speed interconnect applications. Adoption still depends on the particular package design and validation.
Distinction: An application direction is not an order announcement. The map does not infer purchases by NVIDIA, AMD or other chip companies from a particular glass-substrate supplier.
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